412 lines
13 KiB
C
412 lines
13 KiB
C
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// BSD 3-Clause License
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//
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// Copyright (c) 2021, Aaron Giles
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice, this
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// list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef YMFM_ADPCM_H
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#define YMFM_ADPCM_H
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#pragma once
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#include "ymfm.h"
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namespace ymfm
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{
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//*********************************************************
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// INTERFACE CLASSES
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//*********************************************************
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// forward declarations
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class adpcm_a_engine;
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class adpcm_b_engine;
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// ======================> adpcm_a_registers
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//
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// ADPCM-A register map:
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//
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// System-wide registers:
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// 00 x------- Dump (disable=1) or keyon (0) control
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// --xxxxxx Mask of channels to dump or keyon
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// 01 --xxxxxx Total level
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// 02 xxxxxxxx Test register
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// 08-0D x------- Pan left
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// -x------ Pan right
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// ---xxxxx Instrument level
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// 10-15 xxxxxxxx Start address (low)
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// 18-1D xxxxxxxx Start address (high)
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// 20-25 xxxxxxxx End address (low)
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// 28-2D xxxxxxxx End address (high)
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//
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class adpcm_a_registers
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{
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public:
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// constants
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static constexpr uint32_t OUTPUTS = 2;
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static constexpr uint32_t CHANNELS = 6;
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static constexpr uint32_t REGISTERS = 0x30;
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static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1;
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// constructor
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adpcm_a_registers() { }
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// reset to initial state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// map channel number to register offset
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static constexpr uint32_t channel_offset(uint32_t chnum)
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{
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assert(chnum < CHANNELS);
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return chnum;
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}
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// direct read/write access
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void write(uint32_t index, uint8_t data) { m_regdata[index] = data; }
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// system-wide registers
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uint32_t dump() const { return bitfield(m_regdata[0x00], 7); }
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uint32_t dump_mask() const { return bitfield(m_regdata[0x00], 0, 6); }
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uint32_t total_level() const { return bitfield(m_regdata[0x01], 0, 6); }
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uint32_t test() const { return m_regdata[0x02]; }
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// per-channel registers
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uint32_t ch_pan_left(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 7); }
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uint32_t ch_pan_right(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 6); }
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uint32_t ch_instrument_level(uint32_t choffs) const { return bitfield(m_regdata[choffs + 0x08], 0, 5); }
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uint32_t ch_start(uint32_t choffs) const { return m_regdata[choffs + 0x10] | (m_regdata[choffs + 0x18] << 8); }
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uint32_t ch_end(uint32_t choffs) const { return m_regdata[choffs + 0x20] | (m_regdata[choffs + 0x28] << 8); }
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// per-channel writes
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void write_start(uint32_t choffs, uint32_t address)
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{
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write(choffs + 0x10, address);
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write(choffs + 0x18, address >> 8);
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}
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void write_end(uint32_t choffs, uint32_t address)
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{
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write(choffs + 0x20, address);
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write(choffs + 0x28, address >> 8);
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}
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private:
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// internal state
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uint8_t m_regdata[REGISTERS]; // register data
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};
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// ======================> adpcm_a_channel
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class adpcm_a_channel
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{
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public:
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// constructor
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adpcm_a_channel(adpcm_a_engine &owner, uint32_t choffs, uint32_t addrshift);
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// reset the channel state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// signal key on/off
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void keyonoff(bool on);
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// master clockingfunction
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bool clock();
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// return the computed output value, with panning applied
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template<int NumOutputs>
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void output(ymfm_output<NumOutputs> &output) const;
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private:
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// internal state
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uint32_t const m_choffs; // channel offset
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uint32_t const m_address_shift; // address bits shift-left
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uint32_t m_playing; // currently playing?
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uint32_t m_curnibble; // index of the current nibble
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uint32_t m_curbyte; // current byte of data
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uint32_t m_curaddress; // current address
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int32_t m_accumulator; // accumulator
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int32_t m_step_index; // index in the stepping table
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adpcm_a_registers &m_regs; // reference to registers
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adpcm_a_engine &m_owner; // reference to our owner
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};
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// ======================> adpcm_a_engine
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class adpcm_a_engine
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{
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public:
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static constexpr int CHANNELS = adpcm_a_registers::CHANNELS;
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// constructor
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adpcm_a_engine(ymfm_interface &intf, uint32_t addrshift);
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// reset our status
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// master clocking function
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uint32_t clock(uint32_t chanmask);
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// compute sum of channel outputs
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template<int NumOutputs>
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void output(ymfm_output<NumOutputs> &output, uint32_t chanmask);
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// write to the ADPCM-A registers
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void write(uint32_t regnum, uint8_t data);
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// set the start/end address for a channel (for hardcoded YM2608 percussion)
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void set_start_end(uint8_t chnum, uint16_t start, uint16_t end)
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{
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uint32_t choffs = adpcm_a_registers::channel_offset(chnum);
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m_regs.write_start(choffs, start);
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m_regs.write_end(choffs, end);
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}
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// return a reference to our interface
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ymfm_interface &intf() { return m_intf; }
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// return a reference to our registers
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adpcm_a_registers ®s() { return m_regs; }
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private:
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// internal state
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ymfm_interface &m_intf; // reference to the interface
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std::unique_ptr<adpcm_a_channel> m_channel[CHANNELS]; // array of channels
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adpcm_a_registers m_regs; // registers
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};
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// ======================> adpcm_b_registers
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//
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// ADPCM-B register map:
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//
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// System-wide registers:
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// 00 x------- Start of synthesis/analysis
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// -x------ Record
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// --x----- External/manual driving
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// ---x---- Repeat playback
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// ----x--- Speaker off
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// -------x Reset
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// 01 x------- Pan left
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// -x------ Pan right
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// ----x--- Start conversion
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// -----x-- DAC enable
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// ------x- DRAM access (1=8-bit granularity; 0=1-bit)
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// -------x RAM/ROM (1=ROM, 0=RAM)
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// 02 xxxxxxxx Start address (low)
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// 03 xxxxxxxx Start address (high)
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// 04 xxxxxxxx End address (low)
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// 05 xxxxxxxx End address (high)
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// 06 xxxxxxxx Prescale value (low)
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// 07 -----xxx Prescale value (high)
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// 08 xxxxxxxx CPU data/buffer
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// 09 xxxxxxxx Delta-N frequency scale (low)
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// 0a xxxxxxxx Delta-N frequency scale (high)
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// 0b xxxxxxxx Level control
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// 0c xxxxxxxx Limit address (low)
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// 0d xxxxxxxx Limit address (high)
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// 0e xxxxxxxx DAC data [YM2608/10]
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// 0f xxxxxxxx PCM data [YM2608/10]
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// 0e xxxxxxxx DAC data high [Y8950]
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// 0f xx------ DAC data low [Y8950]
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// 10 -----xxx DAC data exponent [Y8950]
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//
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class adpcm_b_registers
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{
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public:
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// constants
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static constexpr uint32_t REGISTERS = 0x11;
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// constructor
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adpcm_b_registers() { }
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// reset to initial state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// direct read/write access
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void write(uint32_t index, uint8_t data) { m_regdata[index] = data; }
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// system-wide registers
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uint32_t execute() const { return bitfield(m_regdata[0x00], 7); }
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uint32_t record() const { return bitfield(m_regdata[0x00], 6); }
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uint32_t external() const { return bitfield(m_regdata[0x00], 5); }
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uint32_t repeat() const { return bitfield(m_regdata[0x00], 4); }
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uint32_t speaker() const { return bitfield(m_regdata[0x00], 3); }
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uint32_t resetflag() const { return bitfield(m_regdata[0x00], 0); }
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uint32_t pan_left() const { return bitfield(m_regdata[0x01], 7); }
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uint32_t pan_right() const { return bitfield(m_regdata[0x01], 6); }
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uint32_t start_conversion() const { return bitfield(m_regdata[0x01], 3); }
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uint32_t dac_enable() const { return bitfield(m_regdata[0x01], 2); }
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uint32_t dram_8bit() const { return bitfield(m_regdata[0x01], 1); }
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uint32_t rom_ram() const { return bitfield(m_regdata[0x01], 0); }
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uint32_t start() const { return m_regdata[0x02] | (m_regdata[0x03] << 8); }
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uint32_t end() const { return m_regdata[0x04] | (m_regdata[0x05] << 8); }
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uint32_t prescale() const { return m_regdata[0x06] | (bitfield(m_regdata[0x07], 0, 3) << 8); }
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uint32_t cpudata() const { return m_regdata[0x08]; }
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uint32_t delta_n() const { return m_regdata[0x09] | (m_regdata[0x0a] << 8); }
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uint32_t level() const { return m_regdata[0x0b]; }
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uint32_t limit() const { return m_regdata[0x0c] | (m_regdata[0x0d] << 8); }
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uint32_t dac() const { return m_regdata[0x0e]; }
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uint32_t pcm() const { return m_regdata[0x0f]; }
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private:
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// internal state
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uint8_t m_regdata[REGISTERS]; // register data
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};
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// ======================> adpcm_b_channel
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class adpcm_b_channel
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{
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static constexpr int32_t STEP_MIN = 127;
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static constexpr int32_t STEP_MAX = 24576;
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public:
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static constexpr uint8_t STATUS_EOS = 0x01;
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static constexpr uint8_t STATUS_BRDY = 0x02;
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static constexpr uint8_t STATUS_PLAYING = 0x04;
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// constructor
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adpcm_b_channel(adpcm_b_engine &owner, uint32_t addrshift);
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// reset the channel state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// signal key on/off
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void keyonoff(bool on);
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// master clocking function
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void clock();
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// return the computed output value, with panning applied
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template<int NumOutputs>
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void output(ymfm_output<NumOutputs> &output, uint32_t rshift) const;
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// return the status register
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uint8_t status() const { return m_status; }
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// handle special register reads
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uint8_t read(uint32_t regnum);
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// handle special register writes
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void write(uint32_t regnum, uint8_t value);
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private:
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// helper - return the current address shift
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uint32_t address_shift() const;
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// load the start address
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void load_start();
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// limit checker; stops at the last byte of the chunk described by address_shift()
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bool at_limit() const { return (m_curaddress == (((m_regs.limit() + 1) << address_shift()) - 1)); }
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// end checker; stops at the last byte of the chunk described by address_shift()
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bool at_end() const { return (m_curaddress == (((m_regs.end() + 1) << address_shift()) - 1)); }
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// internal state
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uint32_t const m_address_shift; // address bits shift-left
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uint32_t m_status; // currently playing?
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uint32_t m_curnibble; // index of the current nibble
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uint32_t m_curbyte; // current byte of data
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uint32_t m_dummy_read; // dummy read tracker
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uint32_t m_position; // current fractional position
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uint32_t m_curaddress; // current address
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||
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|
int32_t m_accumulator; // accumulator
|
||
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|
int32_t m_prev_accum; // previous accumulator (for linear interp)
|
||
|
|
int32_t m_adpcm_step; // next forecast
|
||
|
|
adpcm_b_registers &m_regs; // reference to registers
|
||
|
|
adpcm_b_engine &m_owner; // reference to our owner
|
||
|
|
};
|
||
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|
|
||
|
|
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||
|
|
// ======================> adpcm_b_engine
|
||
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|
|
||
|
|
class adpcm_b_engine
|
||
|
|
{
|
||
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|
public:
|
||
|
|
// constructor
|
||
|
|
adpcm_b_engine(ymfm_interface &intf, uint32_t addrshift = 0);
|
||
|
|
|
||
|
|
// reset our status
|
||
|
|
void reset();
|
||
|
|
|
||
|
|
// save/restore
|
||
|
|
void save_restore(ymfm_saved_state &state);
|
||
|
|
|
||
|
|
// master clocking function
|
||
|
|
void clock();
|
||
|
|
|
||
|
|
// compute sum of channel outputs
|
||
|
|
template<int NumOutputs>
|
||
|
|
void output(ymfm_output<NumOutputs> &output, uint32_t rshift);
|
||
|
|
|
||
|
|
// read from the ADPCM-B registers
|
||
|
|
uint32_t read(uint32_t regnum) { return m_channel->read(regnum); }
|
||
|
|
|
||
|
|
// write to the ADPCM-B registers
|
||
|
|
void write(uint32_t regnum, uint8_t data);
|
||
|
|
|
||
|
|
// status
|
||
|
|
uint8_t status() const { return m_channel->status(); }
|
||
|
|
|
||
|
|
// return a reference to our interface
|
||
|
|
ymfm_interface &intf() { return m_intf; }
|
||
|
|
|
||
|
|
// return a reference to our registers
|
||
|
|
adpcm_b_registers ®s() { return m_regs; }
|
||
|
|
|
||
|
|
private:
|
||
|
|
// internal state
|
||
|
|
ymfm_interface &m_intf; // reference to our interface
|
||
|
|
std::unique_ptr<adpcm_b_channel> m_channel; // channel pointer
|
||
|
|
adpcm_b_registers m_regs; // registers
|
||
|
|
};
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif // YMFM_ADPCM_H
|