902 lines
32 KiB
C++
902 lines
32 KiB
C++
// BSD 3-Clause License
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//
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// Copyright (c) 2021, Aaron Giles
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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//
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// 1. Redistributions of source code must retain the above copyright notice, this
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// list of conditions and the following disclaimer.
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//
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// 2. Redistributions in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// 3. Neither the name of the copyright holder nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#ifndef YMFM_OPL_H
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#define YMFM_OPL_H
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#pragma once
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#include "ymfm.h"
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#include "ymfm_adpcm.h"
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#include "ymfm_fm.h"
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#include "ymfm_pcm.h"
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namespace ymfm
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{
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//*********************************************************
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// REGISTER CLASSES
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//*********************************************************
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// ======================> opl_registers_base
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//
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// OPL/OPL2/OPL3/OPL4 register map:
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//
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// System-wide registers:
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// 01 xxxxxxxx Test register
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// --x----- Enable OPL compatibility mode [OPL2 only] (1 = enable)
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// 02 xxxxxxxx Timer A value (4 * OPN)
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// 03 xxxxxxxx Timer B value
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// 04 x------- RST
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// -x------ Mask timer A
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// --x----- Mask timer B
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// ------x- Load timer B
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// -------x Load timer A
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// 08 x------- CSM mode [OPL/OPL2 only]
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// -x------ Note select
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// BD x------- AM depth
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// -x------ PM depth
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// --x----- Rhythm enable
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// ---x---- Bass drum key on
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// ----x--- Snare drum key on
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// -----x-- Tom key on
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// ------x- Top cymbal key on
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// -------x High hat key on
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// 101 --xxxxxx Test register 2 [OPL3 only]
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// 104 --x----- Channel 6 4-operator mode [OPL3 only]
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// ---x---- Channel 5 4-operator mode [OPL3 only]
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// ----x--- Channel 4 4-operator mode [OPL3 only]
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// -----x-- Channel 3 4-operator mode [OPL3 only]
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// ------x- Channel 2 4-operator mode [OPL3 only]
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// -------x Channel 1 4-operator mode [OPL3 only]
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// 105 -------x New [OPL3 only]
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// ------x- New2 [OPL4 only]
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//
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// Per-channel registers (channel in address bits 0-3)
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// Note that all these apply to address+100 as well on OPL3+
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// A0-A8 xxxxxxxx F-number (low 8 bits)
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// B0-B8 --x----- Key on
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// ---xxx-- Block (octvate, 0-7)
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// ------xx F-number (high two bits)
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// C0-C8 x------- CHD output (to DO0 pin) [OPL3+ only]
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// -x------ CHC output (to DO0 pin) [OPL3+ only]
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// --x----- CHB output (mixed right, to DO2 pin) [OPL3+ only]
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// ---x---- CHA output (mixed left, to DO2 pin) [OPL3+ only]
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// ----xxx- Feedback level for operator 1 (0-7)
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// -------x Operator connection algorithm
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//
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// Per-operator registers (operator in bits 0-5)
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// Note that all these apply to address+100 as well on OPL3+
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// 20-35 x------- AM enable
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// -x------ PM enable (VIB)
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// --x----- EG type
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// ---x---- Key scale rate
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// ----xxxx Multiple value (0-15)
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// 40-55 xx------ Key scale level (0-3)
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// --xxxxxx Total level (0-63)
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// 60-75 xxxx---- Attack rate (0-15)
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// ----xxxx Decay rate (0-15)
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// 80-95 xxxx---- Sustain level (0-15)
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// ----xxxx Release rate (0-15)
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// E0-F5 ------xx Wave select (0-3) [OPL2 only]
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// -----xxx Wave select (0-7) [OPL3+ only]
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//
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template<int Revision>
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class opl_registers_base : public fm_registers_base
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{
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static constexpr bool IsOpl2 = (Revision == 2);
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static constexpr bool IsOpl2Plus = (Revision >= 2);
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static constexpr bool IsOpl3Plus = (Revision >= 3);
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static constexpr bool IsOpl4Plus = (Revision >= 4);
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public:
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// constants
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static constexpr uint32_t OUTPUTS = IsOpl3Plus ? 4 : 1;
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static constexpr uint32_t CHANNELS = IsOpl3Plus ? 18 : 9;
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static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1;
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static constexpr uint32_t OPERATORS = CHANNELS * 2;
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static constexpr uint32_t WAVEFORMS = IsOpl3Plus ? 8 : (IsOpl2Plus ? 4 : 1);
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static constexpr uint32_t REGISTERS = IsOpl3Plus ? 0x200 : 0x100;
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static constexpr uint32_t REG_MODE = 0x04;
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static constexpr uint32_t DEFAULT_PRESCALE = IsOpl4Plus ? 19 : (IsOpl3Plus ? 8 : 4);
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static constexpr uint32_t EG_CLOCK_DIVIDER = 1;
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static constexpr uint32_t CSM_TRIGGER_MASK = ALL_CHANNELS;
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static constexpr bool DYNAMIC_OPS = IsOpl3Plus;
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static constexpr bool MODULATOR_DELAY = !IsOpl3Plus;
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static constexpr uint8_t STATUS_TIMERA = 0x40;
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static constexpr uint8_t STATUS_TIMERB = 0x20;
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static constexpr uint8_t STATUS_BUSY = 0;
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static constexpr uint8_t STATUS_IRQ = 0x80;
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// constructor
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opl_registers_base();
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// reset to initial state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// map channel number to register offset
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static constexpr uint32_t channel_offset(uint32_t chnum)
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{
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assert(chnum < CHANNELS);
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if (!IsOpl3Plus)
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return chnum;
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else
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return (chnum % 9) + 0x100 * (chnum / 9);
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}
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// map operator number to register offset
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static constexpr uint32_t operator_offset(uint32_t opnum)
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{
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assert(opnum < OPERATORS);
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if (!IsOpl3Plus)
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return opnum + 2 * (opnum / 6);
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else
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return (opnum % 18) + 2 * ((opnum % 18) / 6) + 0x100 * (opnum / 18);
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}
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// return an array of operator indices for each channel
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struct operator_mapping { uint32_t chan[CHANNELS]; };
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void operator_map(operator_mapping &dest) const;
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// OPL4 apparently can read back FM registers?
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uint8_t read(uint16_t index) const { return m_regdata[index]; }
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// handle writes to the register array
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bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask);
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// clock the noise and LFO, if present, returning LFO PM value
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int32_t clock_noise_and_lfo();
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// reset the LFO
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void reset_lfo() { m_lfo_am_counter = m_lfo_pm_counter = 0; }
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// return the AM offset from LFO for the given channel
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// on OPL this is just a fixed value
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uint32_t lfo_am_offset(uint32_t choffs) const { return m_lfo_am; }
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// return LFO/noise states
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uint32_t noise_state() const { return m_noise_lfsr >> 23; }
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// caching helpers
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void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache);
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// compute the phase step, given a PM value
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uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm);
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// log a key-on event
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std::string log_keyon(uint32_t choffs, uint32_t opoffs);
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// system-wide registers
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uint32_t test() const { return byte(0x01, 0, 8); }
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uint32_t waveform_enable() const { return IsOpl2 ? byte(0x01, 5, 1) : (IsOpl3Plus ? 1 : 0); }
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uint32_t timer_a_value() const { return byte(0x02, 0, 8) * 4; } // 8->10 bits
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uint32_t timer_b_value() const { return byte(0x03, 0, 8); }
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uint32_t status_mask() const { return byte(0x04, 0, 8) & 0x78; }
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uint32_t irq_reset() const { return byte(0x04, 7, 1); }
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uint32_t reset_timer_b() const { return byte(0x04, 7, 1) | byte(0x04, 5, 1); }
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uint32_t reset_timer_a() const { return byte(0x04, 7, 1) | byte(0x04, 6, 1); }
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uint32_t enable_timer_b() const { return 1; }
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uint32_t enable_timer_a() const { return 1; }
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uint32_t load_timer_b() const { return byte(0x04, 1, 1); }
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uint32_t load_timer_a() const { return byte(0x04, 0, 1); }
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uint32_t csm() const { return IsOpl3Plus ? 0 : byte(0x08, 7, 1); }
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uint32_t note_select() const { return byte(0x08, 6, 1); }
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uint32_t lfo_am_depth() const { return byte(0xbd, 7, 1); }
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uint32_t lfo_pm_depth() const { return byte(0xbd, 6, 1); }
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uint32_t rhythm_enable() const { return byte(0xbd, 5, 1); }
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uint32_t rhythm_keyon() const { return byte(0xbd, 4, 0); }
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uint32_t newflag() const { return IsOpl3Plus ? byte(0x105, 0, 1) : 0; }
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uint32_t new2flag() const { return IsOpl4Plus ? byte(0x105, 1, 1) : 0; }
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uint32_t fourop_enable() const { return IsOpl3Plus ? byte(0x104, 0, 6) : 0; }
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// per-channel registers
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uint32_t ch_block_freq(uint32_t choffs) const { return word(0xb0, 0, 5, 0xa0, 0, 8, choffs); }
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uint32_t ch_feedback(uint32_t choffs) const { return byte(0xc0, 1, 3, choffs); }
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uint32_t ch_algorithm(uint32_t choffs) const { return byte(0xc0, 0, 1, choffs) | (IsOpl3Plus ? (8 | (byte(0xc3, 0, 1, choffs) << 1)) : 0); }
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uint32_t ch_output_any(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 4, 4) : 1; }
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uint32_t ch_output_0(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 4, 1) : 1; }
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uint32_t ch_output_1(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 5, 1) : (IsOpl3Plus ? 1 : 0); }
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uint32_t ch_output_2(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 6, 1) : 0; }
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uint32_t ch_output_3(uint32_t choffs) const { return newflag() ? byte(0xc0 + choffs, 7, 1) : 0; }
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// per-operator registers
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uint32_t op_lfo_am_enable(uint32_t opoffs) const { return byte(0x20, 7, 1, opoffs); }
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uint32_t op_lfo_pm_enable(uint32_t opoffs) const { return byte(0x20, 6, 1, opoffs); }
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uint32_t op_eg_sustain(uint32_t opoffs) const { return byte(0x20, 5, 1, opoffs); }
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uint32_t op_ksr(uint32_t opoffs) const { return byte(0x20, 4, 1, opoffs); }
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uint32_t op_multiple(uint32_t opoffs) const { return byte(0x20, 0, 4, opoffs); }
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uint32_t op_ksl(uint32_t opoffs) const { uint32_t temp = byte(0x40, 6, 2, opoffs); return bitfield(temp, 1) | (bitfield(temp, 0) << 1); }
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uint32_t op_total_level(uint32_t opoffs) const { return byte(0x40, 0, 6, opoffs); }
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uint32_t op_attack_rate(uint32_t opoffs) const { return byte(0x60, 4, 4, opoffs); }
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uint32_t op_decay_rate(uint32_t opoffs) const { return byte(0x60, 0, 4, opoffs); }
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uint32_t op_sustain_level(uint32_t opoffs) const { return byte(0x80, 4, 4, opoffs); }
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uint32_t op_release_rate(uint32_t opoffs) const { return byte(0x80, 0, 4, opoffs); }
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uint32_t op_waveform(uint32_t opoffs) const { return IsOpl2Plus ? byte(0xe0, 0, newflag() ? 3 : 2, opoffs) : 0; }
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protected:
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// return a bitfield extracted from a byte
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uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const
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{
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return bitfield(m_regdata[offset + extra_offset], start, count);
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}
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// return a bitfield extracted from a pair of bytes, MSBs listed first
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uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const
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{
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return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset);
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}
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// helper to determine if the this channel is an active rhythm channel
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bool is_rhythm(uint32_t choffs) const
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{
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return rhythm_enable() && (choffs >= 6 && choffs <= 8);
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}
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// internal state
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uint16_t m_lfo_am_counter; // LFO AM counter
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uint16_t m_lfo_pm_counter; // LFO PM counter
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uint32_t m_noise_lfsr; // noise LFSR state
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uint8_t m_lfo_am; // current LFO AM value
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uint8_t m_regdata[REGISTERS]; // register data
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uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms
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};
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using opl_registers = opl_registers_base<1>;
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using opl2_registers = opl_registers_base<2>;
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using opl3_registers = opl_registers_base<3>;
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using opl4_registers = opl_registers_base<4>;
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// ======================> opll_registers
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//
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// OPLL register map:
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//
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// System-wide registers:
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// 0E --x----- Rhythm enable
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// ---x---- Bass drum key on
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// ----x--- Snare drum key on
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// -----x-- Tom key on
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// ------x- Top cymbal key on
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// -------x High hat key on
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// 0F xxxxxxxx Test register
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//
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// Per-channel registers (channel in address bits 0-3)
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// 10-18 xxxxxxxx F-number (low 8 bits)
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// 20-28 --x----- Sustain on
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// ---x---- Key on
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// --- xxx- Block (octvate, 0-7)
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// -------x F-number (high bit)
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// 30-38 xxxx---- Instrument selection
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// ----xxxx Volume
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//
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// User instrument registers (for carrier, modulator operators)
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// 00-01 x------- AM enable
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// -x------ PM enable (VIB)
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// --x----- EG type
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// ---x---- Key scale rate
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// ----xxxx Multiple value (0-15)
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// 02 xx------ Key scale level (carrier, 0-3)
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// --xxxxxx Total level (modulator, 0-63)
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// 03 xx------ Key scale level (modulator, 0-3)
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// ---x---- Rectified wave (carrier)
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// ----x--- Rectified wave (modulator)
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// -----xxx Feedback level for operator 1 (0-7)
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// 04-05 xxxx---- Attack rate (0-15)
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// ----xxxx Decay rate (0-15)
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// 06-07 xxxx---- Sustain level (0-15)
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// ----xxxx Release rate (0-15)
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//
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// Internal (fake) registers:
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// 40-48 xxxxxxxx Current instrument base address
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// 4E-5F xxxxxxxx Current instrument base address + operator slot (0/1)
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// 70-FF xxxxxxxx Data for instruments (1-16 plus 3 drums)
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//
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class opll_registers : public fm_registers_base
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{
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public:
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static constexpr uint32_t OUTPUTS = 2;
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static constexpr uint32_t CHANNELS = 9;
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static constexpr uint32_t ALL_CHANNELS = (1 << CHANNELS) - 1;
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static constexpr uint32_t OPERATORS = CHANNELS * 2;
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static constexpr uint32_t WAVEFORMS = 2;
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static constexpr uint32_t REGISTERS = 0x40;
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static constexpr uint32_t REG_MODE = 0x3f;
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static constexpr uint32_t DEFAULT_PRESCALE = 4;
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static constexpr uint32_t EG_CLOCK_DIVIDER = 1;
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static constexpr uint32_t CSM_TRIGGER_MASK = 0;
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static constexpr bool EG_HAS_DEPRESS = true;
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static constexpr bool MODULATOR_DELAY = true;
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static constexpr uint8_t STATUS_TIMERA = 0;
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static constexpr uint8_t STATUS_TIMERB = 0;
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static constexpr uint8_t STATUS_BUSY = 0;
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static constexpr uint8_t STATUS_IRQ = 0;
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// OPLL-specific constants
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static constexpr uint32_t INSTDATA_SIZE = 0x90;
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// constructor
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opll_registers();
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// reset to initial state
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void reset();
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// save/restore
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void save_restore(ymfm_saved_state &state);
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// map channel number to register offset
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static constexpr uint32_t channel_offset(uint32_t chnum)
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{
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assert(chnum < CHANNELS);
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return chnum;
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}
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// map operator number to register offset
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static constexpr uint32_t operator_offset(uint32_t opnum)
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{
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assert(opnum < OPERATORS);
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return opnum;
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}
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// return an array of operator indices for each channel
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struct operator_mapping { uint32_t chan[CHANNELS]; };
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void operator_map(operator_mapping &dest) const;
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// read a register value
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uint8_t read(uint16_t index) const { return m_regdata[index]; }
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// handle writes to the register array
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bool write(uint16_t index, uint8_t data, uint32_t &chan, uint32_t &opmask);
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// clock the noise and LFO, if present, returning LFO PM value
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int32_t clock_noise_and_lfo();
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// reset the LFO
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void reset_lfo() { m_lfo_am_counter = m_lfo_pm_counter = 0; }
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// return the AM offset from LFO for the given channel
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// on OPL this is just a fixed value
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uint32_t lfo_am_offset(uint32_t choffs) const { return m_lfo_am; }
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// return LFO/noise states
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uint32_t noise_state() const { return m_noise_lfsr >> 23; }
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// caching helpers
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void cache_operator_data(uint32_t choffs, uint32_t opoffs, opdata_cache &cache);
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// compute the phase step, given a PM value
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uint32_t compute_phase_step(uint32_t choffs, uint32_t opoffs, opdata_cache const &cache, int32_t lfo_raw_pm);
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// log a key-on event
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std::string log_keyon(uint32_t choffs, uint32_t opoffs);
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// set the instrument data
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|
void set_instrument_data(uint8_t const *data)
|
|
{
|
|
std::copy_n(data, INSTDATA_SIZE, &m_instdata[0]);
|
|
}
|
|
|
|
// system-wide registers
|
|
uint32_t rhythm_enable() const { return byte(0x0e, 5, 1); }
|
|
uint32_t rhythm_keyon() const { return byte(0x0e, 4, 0); }
|
|
uint32_t test() const { return byte(0x0f, 0, 8); }
|
|
uint32_t waveform_enable() const { return 1; }
|
|
uint32_t timer_a_value() const { return 0; }
|
|
uint32_t timer_b_value() const { return 0; }
|
|
uint32_t status_mask() const { return 0; }
|
|
uint32_t irq_reset() const { return 0; }
|
|
uint32_t reset_timer_b() const { return 0; }
|
|
uint32_t reset_timer_a() const { return 0; }
|
|
uint32_t enable_timer_b() const { return 0; }
|
|
uint32_t enable_timer_a() const { return 0; }
|
|
uint32_t load_timer_b() const { return 0; }
|
|
uint32_t load_timer_a() const { return 0; }
|
|
uint32_t csm() const { return 0; }
|
|
|
|
// per-channel registers
|
|
uint32_t ch_block_freq(uint32_t choffs) const { return word(0x20, 0, 4, 0x10, 0, 8, choffs); }
|
|
uint32_t ch_sustain(uint32_t choffs) const { return byte(0x20, 5, 1, choffs); }
|
|
uint32_t ch_total_level(uint32_t choffs) const { return instchbyte(0x02, 0, 6, choffs); }
|
|
uint32_t ch_feedback(uint32_t choffs) const { return instchbyte(0x03, 0, 3, choffs); }
|
|
uint32_t ch_algorithm(uint32_t choffs) const { return 0; }
|
|
uint32_t ch_instrument(uint32_t choffs) const { return byte(0x30, 4, 4, choffs); }
|
|
uint32_t ch_output_any(uint32_t choffs) const { return 1; }
|
|
uint32_t ch_output_0(uint32_t choffs) const { return !is_rhythm(choffs); }
|
|
uint32_t ch_output_1(uint32_t choffs) const { return is_rhythm(choffs); }
|
|
uint32_t ch_output_2(uint32_t choffs) const { return 0; }
|
|
uint32_t ch_output_3(uint32_t choffs) const { return 0; }
|
|
|
|
// per-operator registers
|
|
uint32_t op_lfo_am_enable(uint32_t opoffs) const { return instopbyte(0x00, 7, 1, opoffs); }
|
|
uint32_t op_lfo_pm_enable(uint32_t opoffs) const { return instopbyte(0x00, 6, 1, opoffs); }
|
|
uint32_t op_eg_sustain(uint32_t opoffs) const { return instopbyte(0x00, 5, 1, opoffs); }
|
|
uint32_t op_ksr(uint32_t opoffs) const { return instopbyte(0x00, 4, 1, opoffs); }
|
|
uint32_t op_multiple(uint32_t opoffs) const { return instopbyte(0x00, 0, 4, opoffs); }
|
|
uint32_t op_ksl(uint32_t opoffs) const { return instopbyte(0x02, 6, 2, opoffs); }
|
|
uint32_t op_waveform(uint32_t opoffs) const { return instchbyte(0x03, 3 + bitfield(opoffs, 0), 1, opoffs >> 1); }
|
|
uint32_t op_attack_rate(uint32_t opoffs) const { return instopbyte(0x04, 4, 4, opoffs); }
|
|
uint32_t op_decay_rate(uint32_t opoffs) const { return instopbyte(0x04, 0, 4, opoffs); }
|
|
uint32_t op_sustain_level(uint32_t opoffs) const { return instopbyte(0x06, 4, 4, opoffs); }
|
|
uint32_t op_release_rate(uint32_t opoffs) const { return instopbyte(0x06, 0, 4, opoffs); }
|
|
uint32_t op_volume(uint32_t opoffs) const { return byte(0x30, 4 * bitfield(~opoffs, 0), 4, opoffs >> 1); }
|
|
|
|
private:
|
|
// return a bitfield extracted from a byte
|
|
uint32_t byte(uint32_t offset, uint32_t start, uint32_t count, uint32_t extra_offset = 0) const
|
|
{
|
|
return bitfield(m_regdata[offset + extra_offset], start, count);
|
|
}
|
|
|
|
// return a bitfield extracted from a pair of bytes, MSBs listed first
|
|
uint32_t word(uint32_t offset1, uint32_t start1, uint32_t count1, uint32_t offset2, uint32_t start2, uint32_t count2, uint32_t extra_offset = 0) const
|
|
{
|
|
return (byte(offset1, start1, count1, extra_offset) << count2) | byte(offset2, start2, count2, extra_offset);
|
|
}
|
|
|
|
// helpers to read from instrument channel/operator data
|
|
uint32_t instchbyte(uint32_t offset, uint32_t start, uint32_t count, uint32_t choffs) const { return bitfield(m_chinst[choffs][offset], start, count); }
|
|
uint32_t instopbyte(uint32_t offset, uint32_t start, uint32_t count, uint32_t opoffs) const { return bitfield(m_opinst[opoffs][offset], start, count); }
|
|
|
|
// helper to determine if the this channel is an active rhythm channel
|
|
bool is_rhythm(uint32_t choffs) const
|
|
{
|
|
return rhythm_enable() && choffs >= 6;
|
|
}
|
|
|
|
// internal state
|
|
uint16_t m_lfo_am_counter; // LFO AM counter
|
|
uint16_t m_lfo_pm_counter; // LFO PM counter
|
|
uint32_t m_noise_lfsr; // noise LFSR state
|
|
uint8_t m_lfo_am; // current LFO AM value
|
|
uint8_t const *m_chinst[CHANNELS]; // pointer to instrument data for each channel
|
|
uint8_t const *m_opinst[OPERATORS]; // pointer to instrument data for each operator
|
|
uint8_t m_regdata[REGISTERS]; // register data
|
|
uint8_t m_instdata[INSTDATA_SIZE]; // instrument data
|
|
uint16_t m_waveform[WAVEFORMS][WAVEFORM_LENGTH]; // waveforms
|
|
};
|
|
|
|
|
|
|
|
//*********************************************************
|
|
// OPL IMPLEMENTATION CLASSES
|
|
//*********************************************************
|
|
|
|
// ======================> ym3526
|
|
|
|
class ym3526
|
|
{
|
|
public:
|
|
using fm_engine = fm_engine_base<opl_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
|
|
|
|
// constructor
|
|
ym3526(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
protected:
|
|
// internal state
|
|
uint8_t m_address; // address register
|
|
fm_engine m_fm; // core FM engine
|
|
};
|
|
|
|
|
|
// ======================> y8950
|
|
|
|
class y8950
|
|
{
|
|
public:
|
|
using fm_engine = fm_engine_base<opl_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
|
|
|
|
static constexpr uint8_t STATUS_ADPCM_B_PLAYING = 0x01;
|
|
static constexpr uint8_t STATUS_ADPCM_B_BRDY = 0x08;
|
|
static constexpr uint8_t STATUS_ADPCM_B_EOS = 0x10;
|
|
static constexpr uint8_t ALL_IRQS = STATUS_ADPCM_B_BRDY | STATUS_ADPCM_B_EOS | fm_engine::STATUS_TIMERA | fm_engine::STATUS_TIMERB;
|
|
|
|
// constructor
|
|
y8950(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read_data();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal state
|
|
uint8_t m_address; // address register
|
|
uint8_t m_io_ddr; // data direction register for I/O
|
|
fm_engine m_fm; // core FM engine
|
|
adpcm_b_engine m_adpcm_b; // ADPCM-B engine
|
|
};
|
|
|
|
|
|
|
|
//*********************************************************
|
|
// OPL2 IMPLEMENTATION CLASSES
|
|
//*********************************************************
|
|
|
|
// ======================> ym3812
|
|
|
|
class ym3812
|
|
{
|
|
public:
|
|
using fm_engine = fm_engine_base<opl2_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
|
|
|
|
// constructor
|
|
ym3812(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal state
|
|
uint8_t m_address; // address register
|
|
fm_engine m_fm; // core FM engine
|
|
};
|
|
|
|
|
|
|
|
//*********************************************************
|
|
// OPL3 IMPLEMENTATION CLASSES
|
|
//*********************************************************
|
|
|
|
// ======================> ymf262
|
|
|
|
class ymf262
|
|
{
|
|
public:
|
|
using fm_engine = fm_engine_base<opl3_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
|
|
|
|
// constructor
|
|
ymf262(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write_address_hi(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal state
|
|
uint16_t m_address; // address register
|
|
fm_engine m_fm; // core FM engine
|
|
};
|
|
|
|
|
|
// ======================> ymf289b
|
|
|
|
class ymf289b
|
|
{
|
|
static constexpr uint8_t STATUS_BUSY_FLAGS = 0x05;
|
|
|
|
public:
|
|
using fm_engine = fm_engine_base<opl3_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = 2;
|
|
|
|
// constructor
|
|
ymf289b(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read_data();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write_address_hi(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal helpers
|
|
bool ymf289b_mode() { return ((m_fm.regs().read(0x105) & 0x04) != 0); }
|
|
|
|
// internal state
|
|
uint16_t m_address; // address register
|
|
fm_engine m_fm; // core FM engine
|
|
};
|
|
|
|
|
|
|
|
//*********************************************************
|
|
// OPL4 IMPLEMENTATION CLASSES
|
|
//*********************************************************
|
|
|
|
// ======================> ymf278b
|
|
|
|
class ymf278b
|
|
{
|
|
// Using the nominal datasheet frequency of 33.868MHz, the output of the
|
|
// chip will be clock/768 = 44.1kHz. However, the FM engine is clocked
|
|
// internally at clock/(19*36), or 49.515kHz, so the FM output needs to
|
|
// be downsampled. We treat this as needing to clock the FM engine an
|
|
// extra tick every few samples. The exact ratio is 768/(19*36) or
|
|
// 768/684 = 192/171. So if we always clock the FM once, we'll have
|
|
// 192/171 - 1 = 21/171 left. Thus we count 21 for each sample and when
|
|
// it gets above 171, we tick an extra time.
|
|
static constexpr uint32_t FM_EXTRA_SAMPLE_THRESH = 171;
|
|
static constexpr uint32_t FM_EXTRA_SAMPLE_STEP = 192 - FM_EXTRA_SAMPLE_THRESH;
|
|
|
|
public:
|
|
using fm_engine = fm_engine_base<opl4_registers>;
|
|
static constexpr uint32_t OUTPUTS = 6;
|
|
using output_data = ymfm_output<OUTPUTS>;
|
|
|
|
static constexpr uint8_t STATUS_BUSY = 0x01;
|
|
static constexpr uint8_t STATUS_LD = 0x02;
|
|
|
|
// constructor
|
|
ymf278b(ymfm_interface &intf);
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return input_clock / 768; }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access
|
|
uint8_t read_status();
|
|
uint8_t read_data_pcm();
|
|
uint8_t read(uint32_t offset);
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write_address_hi(uint8_t data);
|
|
void write_address_pcm(uint8_t data);
|
|
void write_data_pcm(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal state
|
|
uint16_t m_address; // address register
|
|
uint32_t m_fm_pos; // FM resampling position
|
|
uint32_t m_load_remaining; // how many more samples until LD flag clears
|
|
bool m_next_status_id; // flag to track which status ID to return
|
|
fm_engine m_fm; // core FM engine
|
|
pcm_engine m_pcm; // core PCM engine
|
|
};
|
|
|
|
|
|
|
|
//*********************************************************
|
|
// OPLL IMPLEMENTATION CLASSES
|
|
//*********************************************************
|
|
|
|
// ======================> opll_base
|
|
|
|
class opll_base
|
|
{
|
|
public:
|
|
using fm_engine = fm_engine_base<opll_registers>;
|
|
using output_data = fm_engine::output_data;
|
|
static constexpr uint32_t OUTPUTS = fm_engine::OUTPUTS;
|
|
|
|
// constructor
|
|
opll_base(ymfm_interface &intf, uint8_t const *data);
|
|
|
|
// configuration
|
|
void set_instrument_data(uint8_t const *data) { m_fm.regs().set_instrument_data(data); }
|
|
|
|
// reset
|
|
void reset();
|
|
|
|
// save/restore
|
|
void save_restore(ymfm_saved_state &state);
|
|
|
|
// pass-through helpers
|
|
uint32_t sample_rate(uint32_t input_clock) const { return m_fm.sample_rate(input_clock); }
|
|
void invalidate_caches() { m_fm.invalidate_caches(); }
|
|
|
|
// read access -- doesn't really have any, but provide these for consistency
|
|
uint8_t read_status() { return 0x00; }
|
|
uint8_t read(uint32_t offset) { return 0x00; }
|
|
|
|
// write access
|
|
void write_address(uint8_t data);
|
|
void write_data(uint8_t data);
|
|
void write(uint32_t offset, uint8_t data);
|
|
|
|
// generate samples of sound
|
|
void generate(output_data *output, uint32_t numsamples = 1);
|
|
|
|
protected:
|
|
// internal state
|
|
uint8_t m_address; // address register
|
|
fm_engine m_fm; // core FM engine
|
|
};
|
|
|
|
|
|
// ======================> ym2413
|
|
|
|
class ym2413 : public opll_base
|
|
{
|
|
public:
|
|
// constructor
|
|
ym2413(ymfm_interface &intf, uint8_t const *instrument_data = nullptr);
|
|
|
|
private:
|
|
// internal state
|
|
static uint8_t const s_default_instruments[];
|
|
};
|
|
|
|
|
|
// ======================> ym2413
|
|
|
|
class ym2423 : public opll_base
|
|
{
|
|
public:
|
|
// constructor
|
|
ym2423(ymfm_interface &intf, uint8_t const *instrument_data = nullptr);
|
|
|
|
private:
|
|
// internal state
|
|
static uint8_t const s_default_instruments[];
|
|
};
|
|
|
|
|
|
// ======================> ymf281
|
|
|
|
class ymf281 : public opll_base
|
|
{
|
|
public:
|
|
// constructor
|
|
ymf281(ymfm_interface &intf, uint8_t const *instrument_data = nullptr);
|
|
|
|
private:
|
|
// internal state
|
|
static uint8_t const s_default_instruments[];
|
|
};
|
|
|
|
|
|
// ======================> ds1001
|
|
|
|
class ds1001 : public opll_base
|
|
{
|
|
public:
|
|
// constructor
|
|
ds1001(ymfm_interface &intf, uint8_t const *instrument_data = nullptr);
|
|
|
|
private:
|
|
// internal state
|
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static uint8_t const s_default_instruments[];
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};
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}
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#endif // YMFM_OPL_H
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